Recently, plasma display panels (hereafter referred to as PDPs) have become a focus of attention for their ability to realize a large, slim, and lightweight display device for use in computers, televisions and the like.
PDPs can be broadly divided into two types: direct current (DC) and alternating current (AC). Of these, AC PDPs are at present the dominant type.
In a typical surface discharge AC PDP, a front substrate and a back substrate are placed in parallel so as to face each other. Scanning electrodes and sustaining electrodes are formed in parallel strips on an inward-facing surface of the front substrate, and also covered by a dielectric layer. Data electrodes are formed in parallel strips perpendicular to the scanning electrodes, on an inward-facing surface of the back substrate. The space between the front substrate and the back substrate is divided into smaller spaces by the stripe ribs. Discharge gas is sealed in these spaces. Discharge cells are formed in the space between the substrates, at the points where the scanning electrodes and the data electrodes intersect, the discharge cells as a whole thus forming a matrix.
When driving a PDP, as shown in FIG. 17, each discharge cell is turned on or off through a sequence of periods: an initialization period in which all discharge cells are initialized by applying an initialize pulse; an address period in which pixel information is written by applying a data pulse to data electrodes that are selected from all of the data electrodes while sequentially applying a scan pulse to the scanning electrodes; a discharge sustain period in which light is emitted by sustaining a main discharge by applying a rectangular-wave sustain pulse to a space between the scanning electrodes and the sustaining electrodes; and an erase period (discharge suspend period) in which wall voltage of the discharge cells is erased.
Each discharge cell is fundamentally only capable of two display states, on and off. Here, an in-field time division gray scale display method in which one frame (one field) is divided into a plurality of sub-fields and the on and off states in each sub-field are combined to express a gray scale is used for driving the plasma display device.
The PDP, as well as other types of displays in general, is becoming to have higher definition. With this tendency, a number of scanning lines increases (e.g. 768 scanning lines for an XGA PDP), and accordingly, a number of write operation also increases.
Normally, widths of a scan pulse and the write pulse for the write operation are defined as about 2–2.5 μs. If the number of the write operation increases, then the address period becomes longer accordingly, and an address period for an XGA PDP may take 1.5–1.9 ms.
Existing VGA PDPs are such that one TV field includes 13 subfields (SFs). If the address period becomes longer, it is inevitable that a number of SFs included in one TV field is reduced to around 8–10, and the reduced number of SFs causes degradation in an image quality.
In response to the above noted problem, an attempt has been made such as making a write pulse width short and performing the address operation in a high speed. For example, the write pulse width for a high-end hi-vision display is defined as short as 1–1.3 μs (highly minute with the number of scanning lines being 1080).
However, setting the write pulse width too short causes a write defect and degradation in the image quality, because discharge may not be completed within a time period of the write pulse, and wall charge by the address discharge is not sufficiently accumulated.